Synopsys Library Compiler (LC) is designed to process ASIC technology libraries and translate their contents into the internal database formats required by Synopsys physical synthesis and implementation tools. It can also convert library information into VHDL format for simulation.
At the core of every ASIC design is a technology library containing a collection of logic cells. These libraries typically include important information such as cell functionality, timing characteristics, area data, power information, and other design parameters.
Library Compiler parses this textual library information to check its completeness and correctness before converting it into a format that can be accessed by Synopsys applications.
Library Compiler provides several capabilities for working with ASIC library data, including:
Technology libraries are essential throughout the ASIC design flow because synthesis and implementation tools need detailed information about the cells available in a particular semiconductor technology.
Library Compiler helps transform this information into a standardized format that can be used across Synopsys applications. By validating and compiling library data before it is used by downstream tools, LC can help identify problems in library descriptions and improve compatibility within the design flow.
Synopsys Library Compiler software details: